5045: Digital Integrated Circuits

數位積體電路

Institute of Electronics, National Chiao-Tung University
Spring 2012

 


<Course Informations>

- Instructor -

- Course Focus and Objective -

  • Design metrics: delay, power, cost, robustness
  • CMOS Transistor and Technology – Scaling and Its Limits
  • Design and modeling of CMOS devices and IC Interconnect
  • Circuit Simulation-SPICE, Combinational and Sequential Circuit Design
  • Clocking and timing, clock distribution, timing analysis
  • Data path and Array Subsystems
  • Special-Purpose Subsystems
  • Memory Subsystem
  • Low Power VLSI Design
  • Variability-award VLSI design
  • Signal integrity, Power integrity
  • Design Methodology and Tools
  • Testing, Debugging and Verification
  • Package
  • The course covers the electrical characteristics of digital integrated circuits. Students will learn how to find logic
  • levels, noise margins, power consumption, and propagation delays of digital integrated circuits based on scaled
  • CMOS technology. The course also provides a fundamental understating of CMOS VLSI Design

- Text Books -

  • Weste/Harris, "CMOS VLSI Design", 4th, Addison Weley,2011
  • Rebaey, "Low Power Design Essentials", Spring, 2009
  • Harris/Harris, "Digital Deaign and Computer Architecture", Elsevier, 2007
  • Rabaey et al, "Digital Integrated Circuits", Prentice Hall, 2003

- Regular Class Hours -

  • Thu. EFG, 1:30-4:30 pm (電資大樓MIRC R201)

- Teaching Assistant -

- Assistant -


<Course Announcements>

- Announcement -

  • The classroom is at MIRC 電資大樓 R201.
  • The make up class will be on Saturday (2nd March), from 9:00 AM to 12:00 PM @ MIRC(電資大樓) Conference Room 3(第三會議室).

- Lectures -

- Supplemental Reading Materials -

- Term Project -

- Exercise -

- Oral Presentaion Subject -