National Chiao-Tung University
Department of Electronics Engineering & Institute of Electronics
Dynamic Frequency Scaling Clock Generator and Power Efficiency Optimization Unit for Solar Cell Power Management System Application
Student : Chih-Hao Kan
Advisor : Dr. Wei Hwang
The portable device has been widely used, the low power consumption has become the main concern of circuit design; and the deep-submicron process also bring the trend of replacement of analog intensive architectures with more digital ones. This thesis proposed a digital dual output clock generator with dynamic frequency/phase tuning ability. Each output is independent when tuning frequency and phase and total six multiplied factors are available. The proposed clock generator uses smooth charge phase blender to increase the phase information. The low power delay cell saves the power consumption and the digital charge-detecting controller can achieve fast lock. The low voltage oscillators also had been researched and used it in power efficiency optimization unit. The power efficiency optimization unit supplies a variable frequency (33MHz~300MHz) clock to 1V generator according to the loading condition. The unit is applied in the solar cell power management system. The system accepts power from photovoltaic cell and outputs 500mV, -500mV and 1V to computation circuit and memory circuit. In daytime, the power management is supplied by solar energy and the battery is charged. At night, the battery will supply energy to power management system. All research is implemented in UMC 90nm CMOS technology.